المقالات العلمية

Performance Comparison of Digital Circuits Using Subthreshold Leakage Power Reduction Techniques

… power dissipation. In this paper, the characteristics of inverter, twoinput negative-AND (NAND) gate, and half adder digital circuits were analyzed and compared in 45nm, 120nm, 180nm technology nodes by applying several leakage power reduction methodologies to conventional CMOS designs. The sleepy keeper technique when …